Toshiba presented a neuromorphic processor with ultra-low power consumption
Toshiba reported on the progress in the establishment of neural networks the temporal domain (Time Domain Neural Network, TDNN) using neuromorphic semiconductor circuit with ultra-low power consumption, is able to perform deep learning. Network TDNN consists of a large number of processing chains that use digital processing in modern processors, and the signature of analog processing. Allegedly, these networks are becoming more relevant for big data Analytics in connection with the expansion of the Internet of things.
Deep learning requires a lot of computation. Now they perform the usual processors, is not optimal for this task, so the learning process has low energy efficiency. The decision may be a rejection of the classical computer architecture that has a significant overhead for data transfer between processor and memory. The most effective alternative is the presence of a huge number of processing circuits, each of which works with one dataset element, located as close as possible to her. In the process of converting the input signal to the output points of the stored data elements are assigned a certain weight, and the closer the point to the output signal, the more weight it gets. The weight is a parameter that automatically manages deep learning.
It is believed that the brain is designed on the same principle, where the strength of connections between neurons is the weight factor built into the processing chain (synapses). The strength of the relationships is determined by the output signal. Attempt to reproduce the architecture of classical computing resources leads to extremely cumbersome and inefficient solutions.
The processor Toshiba uses a technology mixed analog-digital processing TDAMS developed in 2013. In such a processor, arithmetic operations such as add, are performed by the digital delay signal, and to implement the processing element is sufficient in all three logic gates and one bit of memory. The prototype, manufactured by Toshiba that uses SRAM cells, showed successful recognition of handwritten characters. This power was very low. To further reduce the size of the chain and energy use in Toshiba plan to use the memory type ReRAM.
Development in this area lead other manufacturers. For example, recently it became known that SK Hynix will develop neuromorphic chip together at Stanford University.