Presented graphics architecture AMD Vega

As promised, AMD today announced graph architecture of Vega.

As one of the key features of AMD, Vega claimed good scalability to the ever-growing needs of graphical and computational tasks. In many ways, it provided tighter integration of GPU and memory. Based on the fast memory HBM that is already used in the current generation of 3D cards from AMD, the manufacturer transformed it into a high-performance cache memory (High-Bandwidth Cache) and called HBM2. The controller of this memory allows the use of flat address space of 512 TB, and blocks the pixel and texture processing can access the memory simultaneously.

HBM2 bandwidth is 512 GB/s HBM than it is twice more, and the capacity per stack of chips increased eight times, that is, the 3D map can theoretically have up to 32 GB of memory. In addition, HBM2 significantly — four to five times superior to the GDDR5 on energy efficiency.

As for the GPU, he got a new programmable geometric engine, which, as stated, due to algorithmic innovations, eliminating the processing of objects that overlapped in the frame other objects can significantly speed up the construction of scenes. For comparison, the GPU Fiji with four geometric engines for each cycle handles the four polygon Vega — eleven.

In addition, improved distribution of load between the computational blocks and the blocks related to a new generation. Manufacturer their so called — Vega NCU (Next-Generation Compute Unit). From its predecessors NCU differ, in particular, twice the performance for floating-point calculations. In each cycle the Vega unit NCU 128 performs operations with single-precision (FP32) or 256 FP16 operations.

The emergence of a GPU on a new architecture is expected in the current semester.

Read more about architecture of Vega and AMD FreeSync technology 2 described in our article.

Source: AMD



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