IP — PLDA XpressRICH4-AXI PCIe 4.0 allows you to link AXI and PCIe single-chip systems
PLDA, the company specializing in the implementations of PCIe interface-level IP-cores, announced another development in this area. IP — XpressRICH4-AXI PCIe 4.0 is designed to integrate AXI and PCIe single-chip systems.
Now the developers of single-chip systems integrating bus AXI and PCIe, have to manually correct possible errors and to ensure the preservation of the interface performance. Bridge XpressRICH4-AXI addresses this problem. It provides full PCIe performance, while simultaneously eliminating the risk of inconsistencies on the side of the AXI. Recall that AXI is included in the architecture of internal connections of ARM AMBA.
Configuration XpressRICH4-includes AXI PLDA PCIe controller of the fourth generation, proven in practice. The bridge supports built-in features of PCIe, such as AER (Advanced Error Reporting), and managing packages, including the division into packages of different lengths and merging packages, AXI and PCIe. Flexible configuration interface AMBA AXI allows you to select various combinations of AXI Master, AXI Slave and the AXI Stream, as well as 64-bit, 128-bit or 256-bit data bus. The connection of the AXI can include up to four combinations of Master/Slave interfaces four Stream and one Lite interface (Master/Slave) in various combinations.