Experts at MIT have figured out how to improve the performance of the cache memory
A year ago, experts at the Massachusetts Institute of technology (MIT) unveiled a radically new way of managing the cache memory, providing more effective interaction between the nuclei. According to the developers, systems with hundreds of cores it allows you to free up 15-25% of internal memory. However, the development, called Tardis, was hardly applicable to modern processors, as it relies on extrinsic nature of the calculations. Last week the specialists from MIT talked about the new version of its development, which is quite suitable for the existing processors. In addition, it has several improvements compared to the original version.
Detailed description of the technology the Tardis and its new version is beyond news. In short, the kernel is equipped with counters to account for the operations of reading and writing and mark the data time stamps. Use labels, not real time values allows to synchronize data access from concurrent threads, because, guided by the values of the labels, the kernel to perceive the data as handled earlier, even if physically they were handled later. This gives more freedom in reordering computations and eliminates the overhead associated with local copies of data. The developers say that their scheme is suitable for integration into systems that use different schemes ensure data integrity.
New scheme of organisation of working memory is applicable not only to the cache memory. The researchers believe that it can simplify the existing memory hierarchy in the system.